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| 47 Perimeter Ctr E, Suite 410 |
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Objectives
The new learning objectives of this exercise are to compare SysML and Simulink models, update a SysML block structure from a modified Simulink model, and update a Simulink model from a modified SysML block structure. The same processes apply to SysML activity models.
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This exercise assumes the student has
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_Hlk44840893 _Hlk44840893 IBM Rational Rhapsody 8.2 installed correctly on his or her machine with a valid license for use, and
Syndeia 3.3 installed as a plugin for Rhapsody with a valid license for use
Syndeia Simulink interface, correctly installed with a valid license for use,
MATLAB/Simulink R2016b or later, installed correctly on his or her machine with a valid license for use. We also assume the student is sufficiently familiar with Simulink to modify the Simulink model in Steps 6 and 7 below without detailed instructions.
We will use the provided MagicDraw project Syndeia Tutorial Testbed.rpy. We assume the user has completed Exercise 10.1.
Exercise
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If not already open from the previous exercises, open Syndeia Tutorial Testbed.rpy and launch the Syndeia dashboard from the Simulink_Tutorial Part 2 package. Select a Syndeia Cloud project, if required.
Navigate to the Connection Browser tab, expand the System block to see the connection, and right-click > Compare Source & Target as shown in Figure 1. Click yes to confirm. Be careful to work with models and connections in Simulink_Tutorial Part 2, those created in Exercise 10.2.
Anchor _Ref483917828 _Ref483917828
Figure 1 Syndeia Connection Browser, compare initial models
Comparison Results tab should show that all elements are in sync, as shown in Figure 2.
Anchor _Ref483917971 _Ref483917971
Figure 2 Comparison results for initial SysML and Simulink models, before changes.
Open the System Simulink model in MATLAB/Simulink environment (Figure 3).
Anchor _Ref484024488 _Ref484024488 
Figure 3 System Simulink model before changes
Add the following to System Simulink model.
Port out3 with type Boolean (as a shortcut, copy/paste existing out2)
Model Reference Block pD : PartD
Copy/Paste Simulink model PartC in the folder, rename to PartD, open and delete all elements inside PartD except for in1 and out2 ports.
In the System Simulink model, copy/paste pC, change name to pD, open its Parameters window and change Model name to PartD.
Lines [pA.out1 – pD.in1] & [pD.out1 – out3]
Save the intermediate model. It should appear similar to Figure 4.
Anchor _Ref483918560 _Ref483918560 
Figure 4 System Simulink model, partially modified
Delete the following from System Simulink model
Lines to and from pB
Model Reference Block pB : PartB
Port in2 on the System block
Save the final model. It should appear similar to Figure 5.
Anchor _Ref483918812 _Ref483918812 
Figure 5 System Simulink model, fully modified
Repeat Step 3 to Compare SysML & Target. The results should appear as in Figure 6.
Anchor _Ref484025784 _Ref484025784 
Figure 6 Comparison results after Simulink model
changeschanges
Update the SysML model from the modified Simulink model
In the Connection Manager, right-click the System block connection (as in Step 8 above) and choose Sync Target -> Source.
Go to the SysML IBD for the System block. Right-click inside the diagram and select Display Parts/Ports (Figure 7)
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Figure 7 Simulink model opened in Simulink
Check pD:PartD, its ports in1 and out2, and the new System block port out3, as shown.
After rearrangement, the SysML IBD should appear similar to Figure 8.
Caution: When making changes in a multi-level block structure, you should sync leaf-level blocks BEFORE syncing parent models. For example, if you add and/or delete ports on PartC block, which is used as part property pC in System, you should compare and sync PartC to resolve changes, before comparing and syncing the parent block, System. This is not necessary for a new child being added that is not yet connected, as shown with pD : PartD in this example.
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Save and close the Simulink model.
Add the following to the System block in the Rhapsody SysML model:
Copy PartC to create PartC1 in the Syndeia_Simulink Part 2 package.
Create a part pC1:PartC1 in System and drag into IBD.
Create a connector between pC1.out2 and pC.in2
Delete the following from the System block (be sure to delete them from the model, not just the diagram; Syndeia always works from the model):
Part Property pA : PartA (three connectors: in1 - pA.in1, pA.out1 - pC.in1, and pA.out1-pD.in1, should be deleted automatically)
The final System IBD should appear similar to Figure 8.
Anchor _Ref484028741 _Ref484028741 
Figure 8 System SysML model, modified after completion of Step 11
Repeat Step 3 to Compare Source & Target. The results should appear similar to Figure 9.
Anchor _Ref484028865 _Ref484028865 
Figure 9 Comparison results after SysML model
changeschanges
Update the Simulink model from the modified SysML model
In the Connection Manager, right-click the System block connection (as in Step 8 above) and choose Sync Source to Target.
Open the Simulink model which should appear similar to Figure 10.
Figure 10 Simulink model, final
Caution: As noted before, when making changes in a multi-level block structure, you should sync leaf-level blocks BEFORE syncing parent models.
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