Objectives
The new learning objective of this exercise is to generate a Simulink model from a SysML block structure.
Preparation
This exercise assumes the student has
Cameo System Modeler 18.0 - 19.0 (or MagicDraw with SysML plug-in) installed correctly on his or her machine with a valid license for use,
Syndeia 3.4 installed as a plugin for Cameo/MagicDraw with a valid license for use,
Syndeia Simulink interface, correctly installed with a valid license for use,
MATLAB/Simulink R2016b or later, installed correctly on his or her machine with a valid license for use.
We will use the provided MagicDraw project Syndeia Tutorial Testbed.mdzip (get it here - SysML Models, Profiles and Mappings). The user should set up a repository connection to their local file system where they can generate the Simulink files for the exercises.
Example – SysML to Simulink
The SysML model shown in Figure 1 will be used in a model transform to a Simulink model on a local file system. It includes both proxy and full ports. Syndeia also transforms flow ports, a deprecated SysML element type, but they are not used in this example.
Figure 1 SysML Starter Model
Exercise
Open Syndeia Tutorial Testbed.mdzip (get it here - SysML Models, Profiles and Mappings) and launch the Syndeia dashboard from the Simulink_Tutorial Part 1 package. Select a Syndeia Cloud project, if required.
In the Settings tab, as shown in Figure 2, select the desired options for the SysML-to-Simulink transformation. For example, we chose to create Model Reference blocks in Simulink and we want to perform on the transform recursively to deeper and deeper levels of SysML blocks.
Figure 2 Syndeia Settings tab
In the Connection Manager tab, load the SysML model in the left column, the local repository connection in the right (Dirk Local in this example), and select Model Transform connection type in the middle column). Drag-n-drop the System block to a folder in the local file system repository (MATLAB/Simulink/1_Demo in this example), as shown in Figure 3 below.
Figure 3 Drag-n-drop a SysML block to a folder to generate a Simulink model
Select Generate Simulink model option in the dialog box and click Yes to continue.
Figure 4 Selection option to generate a Simulink model
Wait for Simulink model to be generated. This may take a minute because MATLAB must be started in the background to enable the Simulink model generation. The process is complete when the status message in the lower left corner of the Syndeia dashboard changes from "Creating Simulink artifacts…" to "Ready".
Syndeia will finish generating Simulink model structure based on the internal structure of SysML block, as shown in Figure 5. Expand top-level model file (System.slx) to view the structure of the Simulink model that is generated. This will load the model using Simulink. Then expand the Simulink model System (symbol) to see the internal details and compare with the SysML block structure (LHS).
Figure 5 Simulink model structure generated from SysML block structure
As seen in Figure 5, a Simulink model was generated for each SysML block in the context of the System block structure. Part properties pA, pB, and pC of the System block were generated as model references with the same name in the Simulink model. Full and proxy ports of the System block were generated as Simulink ports, and connectors were generated as lines with signal flows.
Right click on the System.slx file in the System Simulink model in the Syndeia Dashboard and select Open. This will open the newly generated Simulink model in Simulink, as shown in Figure 6 below—after re-arranging the layout to match SysML IBD in Figure 1.
Figure 6 Simulink model opened in Simulink
Click on the Connection Browser tab in the Syndeia Dashboard, right-click on the Blocks package and select Refresh. Expand the PartC and System blocks. You should see in Figure 7 that a model transform connection has been created between each block in the structure and the corresponding block in the Simulink model that has been generated.
Figure 7 Syndeia generates model transform connections between SysML blocks and Simulink