Rules and Limitations

Syndeia’s SysML-Simulink capabilities have the following rules and limitations. Several of these are due to inherent modeling restrictions in Simulink.

1. SysML port types – Syndeia supports full, proxy, and flow ports in SysML. Full ports must be typed by a block with one or more flow properties. Proxy ports must be typed by a block with one or more flow properties. Flow ports must be typed by a value type or a flow specification with one or more flow properties.
    
2. Direction – The following rules are used to determine the direction of information flow in SysML for generating ports and signals in Simulink.
   1. If the direction of a port / activity parameter node (APN) / pin is IN or OUT, then that direction will be used. If the direction of the flow properties typing that port / APN / pin contradicts the direction of the port / APN / pin, Syndeia will show a warning message in the log window.
   2. If the direction of a port / APN / pin is INOUT or not specified/null, Syndeia will use the flow property direction(s). If port / APN / pin direction is INOUT, Syndeia will show a warning. 
   3. If the flow properties are null / mixed directions / INOUT in the case of item 2 above, Syndeia will show a warning AND ignore the port / APN / pin.
       
3. Value typed for ports and flow properties - The flow properties in blocks, interface blocks, or flow specifications typing full, proxy, and flow ports respectively may be typed by Real, Integer, and Boolean value types which map to double, int32, and boolean types respectively in Simulink. The same is true for value types used for atomic flow ports.
    
4. Activity parameter node types – Activity parameter nodes must either be typed by Real, Integer, or Boolean value types (as for ports), or blocks with one or more flow properties that are typed by these value types.
    
5. Assign name and type - All ports and activity parameter nodes must have a name and type. Part properties and call behavior actions must have a name and type.
    
6. Avoid spaces in names - SysML model elements with spaces in names are not recommended since Simulink does not allow them. However, Syndeia substitutes spaces in names with an underscore when generating Simulink models. Name uniqueness may be violated if two elements are named the same except where one has an underscore and the other has a space, i.e. "Bus 1" and "Bus_1" 
    
7. Simulink Library block caveats – For SysML blocks and activities that are assigned the Simulink_Library_Block stereotype, ensure that the value properties, properties, or tags do not have white spaces in their names. Any model elements referenced in these properties should also not have names with white spaces. Users must verify the names and values of properties/tags corresponding to Simulink library blocks before attempting to generate in Simulink.
    
8. SysML activity models - Parameters must agree with the corresponding activity parameter nodes in name and type. Input/output pins must agree with corresponding activity parameter nodes in name and type.
   
   
9. Stateflow - SysML → Stateflow, and Stateflow → SysML generation only generates simple states and not composite states. Only the states and their transitions are generated. The internal do behaviors and the entry/exit behaviors of the states are not generated in either direction.